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The increasing complexity of integrated circuit design requires customizing Power, Performance, and Area (PPA) metrics according to different application demands. However, most engineers cannot anticipate requirements early in the design process, often discovering mismatches only after synthesis, necessitating iterative optimization or redesign. Some works have shown the promising capabilities of large language models (LLMs) in hardware design generation tasks, but they fail to tackle the PPA trade-off problem. In this work, we propose an LLM-based reinforcement learning framework, PPA-RTL, aiming to introduce LLMs as a cutting-edge automation tool by directly incorporating post-synthesis metrics PPA into the hardware design generation phase. We design PPA metrics as reward feedback to guide the model in producing designs aligned with specific optimization objectives across various scenarios. The experimental results demonstrate that PPA-RTL models, optimized for Power, Performance, Area, or their various combinations, significantly improve in achieving the desired trade-offs, making PPA-RTL applicable to a variety of application scenarios and project constraints. 

Integrated circuit design is a highly complex and time-consuming process. Leveraging large language models (LLMs) for automating hardware design generation is receiving increasing attention. A prominent challenge is that the inherent structure of the text is overlooked during the training process. Existing efforts focus on supervised fine-tuning LLMs to acquire specialized knowledge in hardware design, without considering the conflict between LLMs' linear data processing and the structural nature inherent in hardware design. In this work, we propose a novel LLM-based reinforcement learning (RL) framework that integrates Abstract Syntax Trees (ASTs) and Data Flow Graphs (DFGs). Our approach enhances the accuracy of generated hardware code by capturing the syntactic and semantic structures of hardware designs. Experimental results show that the SFT-RL model integrated with Text, AST, and DFG achieves notable improvements: a 12.57% increase on VerilogEval-Human and a 5.49% increase on VerilogEval-Machine, outperforming GPT-4; a 14.29% improvement on RTLLM, approaching GPT-4. 

Chemical reactions, in which bonds break and form, are highly dynamic quantum processes. A fundamental question is whether coherence can be preserved in chemical reactions and then harnessed to generate entangled products. Here we investigated this question by studying the 2KRb $\to$ ${\text{K}}_2$+ Rb₂reaction at 500 nanokelvins, focusing on the nuclear spin degrees of freedom. We prepared the initial nuclear spins in KRb (potassium-rubidium) in an entangled state by lowering the magnetic field to where the spin-spin interaction dominates and characterized the preserved coherence in nuclear spin wave function after the reaction. We observed an interference pattern that is consistent with full coherence at the end of the reaction, suggesting that entanglement prepared within the reactants could be redistributed through the atom-exchange process. 

We explore utilizing our previously observed reactive nuclear spin coherence to control the KRb + KRb ultracold chemical reaction to realize a reaction interferometer. 

This paper reports the first chip-based demonstration (at any frequency) of a CMOS front-end that generates and receives electromagnetic waves with rotating wave phase front (namely orbital angular momentum or OAM). The chip, based on a uniform circularly placed patch antenna array at 0.31THz, transmits reconfigurable OAM modes, which are digitally switched among the m=0 (plane wave), +1 (left-handed), −1 (right-handed) and superposition (+1)+(-1) states. The chip is also reconfigurable into a receiver mode that identifies different OAM modes with >10dB rejection of unintended modes. The array, driven by only one active path, has a measured EIRP of −4.8dBm and consumes 154mW of DC power in the OAM source mode. In the receiver mode, it has a measured conversion loss of 30dB and consumes 166mW of DC power. The output OAM beam profiles and mode orthogonality are experimentally verified and a full silicon OAM link is demonstrated.